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Boundary-scan tools help reduce test costs

Supplier: ProDigitek By: Peter van den Eijnden
07 April, 2011

During the past years of the recession companies have looked at possibilities to minimize costs in all different segments of their business.

Boundary-scan is a technology that can help to reduce the (hidden) costs specifically in the testing of PCBs in manufacturing.

It is for this reason that structural testing was specifically developed as a methodology to find manufacturing defects (opens, shorts and bridges) quickly and accurately.

The advantages of structural testing are:

  • known fault coverage;
  • direct failure diagnosis down to the pin level;
  • possibility of automatic generation of test programs;
  • lower development costs for test programs compared to functional test.

For low-volume applications and for smaller companies structural testing with traditional structural test equipment such as an In-Circuit Tester (ICT), Manufacturing Defects Analyzer (MDA), or more recent a Flying Probe Tester (FPT) cannot always be economically justified due to the price of these testers and the target specific fixtures.

Only larger companies can afford/justify investment in these more expensive traditional testers, and the target specific fixtures.

For this reason, smaller companies and low-volume production often still use the traditional test approach. In this approach, a board is first inspected visually, then some manual probing is done to check resistive values in order to identify any problems that could not be found with visual inspection and finally power is applied to check voltage levels.

After these steps the board is put in a life environment for functional testing. If the board does not pass this functional test it is removed for troubleshooting.

Engineers then perform exhaustive measurements with sophisticated instruments designed to thoroughly exercise the functionality. Problems discovered are often interconnect issues such as shorted or open nets.

Depending on the complexity of the board such debugging may sometimes take several hours per board. Eventually, all of the boards will be repaired and become fully functional using this test and debug methodology, but the (hidden) costs in manpower are significant.

The connectivity problems discovered while testing and debugging these boards are exactly the type of problems that can be found in a much more efficient and economic way by using a structural test method.

With boundary-scan the price no longer has to be an issue and all the advantages provided by the structural test methodology can be exploited, specifically if those test capabilities are already present on the boards.

On many boards the JTAG interface is already used by the design engineers, not for testing, but for JTAG programming of PLDs and FPGAs, or for accessing the debug logic of a microprocessor.

For boards where this is the case the step to using boundary-scan for testing is really small. To exploit the boundary-scan capabilities on the boards, one can start with a minimal investment, free even, and then grow the suite of boundary-scan tools over time as applications get more demanding or product volumes are increasing.

For more information within Australia and New Zealand contact ProDigital Pty Limited.