PICMG 2.30 CompactPCI PlusIO complements the basic COmpactPCI stndard PICMG 2.0. It defines the pin assignment and the function of the user pins on the J2 connetor for 32-bit system slots. CompactPCI PlusIO uses these BP(I/O) signals for leading 4 PCI Express x1 links, 4 SATA, 4 USB 2.0 as well as 2 Ethernet 1000Base-T interfaces to the backplane. CPU boards that support PICMG 2.30(3U/6U) remain compatible to the COmpactPIC basic standard without limitations and can also be used in existing systems.
CompactPCI Serial, in contrast to compact PCI Plus IO is new independent basic standard designated PICMG CPCI-S.0. This standard introduces a a completely new connector. This enables a much higher signal density and supports even higher transmission frequencies of 12Gb/s and more. CompactPCI Serial is based on the mechanics of COmpact PCI, so it remains compatible to IEC 1101, but it only supports modern point-to-point connections. This compatibility allows to use all standard 19" system solutions, because the dimensions of the bakcplanes are identical and are fixed in the same way. The front panels, handles, and the well proven hot plug mechanics-the switch in the handle -also remain the same. Only the connector is replaced by a modern type which is able to support the high frequencies.
The CompactPCI Serial architecture, a simple star combined with a complete mesh for Ethernet, functions without switches and bridges. There is a system slot and up to eight peripheral slots with congruent pin assignments.
The CompactPCI Serial/PlusI/O products from MEN are especially suited for transportation and other mobileapplications, eg. for infotainment systems, as well as for mission-critical industrial systems.
The F50P is controlled by an MPC8548 PowerPC processor with clock frequencies between 800 MHz and 1.5 GHz. The SBC is equipped with ECC-controlled, soldered-on DDR2 RAM for data storage, with up to 16 GB of solid-state Flash disk for program storage as well as industrial FRAM and SRAM.
It provides up to three Gigabit Ethernet channels, six USB ports, up to two SATA interfaces and up to 64 user-definable I/O lines controlled by an optional onboard FPGA. These interfaces can be combined in many variations and are available at the front or at the rear using the board's J2 connector. The J2 pin assignment and connector type are in compliance with the PICMG 2.30 CompactPCI PlusIO standard - the migration path towards CompactPCI Serial. Two USB and two RJ45 Ethernet connectors are already provided at the front panel, and space is left for an optional VGA connector.
The F50P is designed for operation in a conduction or convection cooled environment. For more information contact firstname.lastname@example.org or call +61 2 9906 6988.